Surachoke ThanapitakMahidol University2018-11-092018-11-092014-01-012014 11th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, ECTI-CON 2014. (2014)2-s2.0-84905381530https://repository.li.mahidol.ac.th/handle/20.500.14594/33693An 1 V 33.2 pS OTA, which consumes power at 5.5 nW, is proposed. This OTA employs the input voltage pre-attenuation technique which based on CMOS common drain circuits with diode connected load to reduce the overall transconductance gain. The linear range of this proposed OTA is 370mV for 1 % transconductance gain variation. Additionally, the pseudo-differential GM-C 2 nd order LPF based on this OTA topology which dissipates 82 nW at 1 V supply with 74 dB dynamic range and cutoff frequency from 0.69 Hz-76 Hz has been demonstrated. With comparison to the original work of the pre-input voltage attenuated OTA; the power dissipation, output voltage swing, IRN and DR are improved. All results of this work are simulated on 0.35 μm standard CMOS process. © 2014 IEEE.Mahidol UniversityComputer ScienceConference PaperSCOPUS10.1109/ECTICon.2014.6839763