Chutham SawigunSurachoke ThanapitakMahidol UniversityMahanakorn University of Technology2019-08-232019-08-232018-11-01IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Vol.26, No.11 (2018), 2290-2298106382102-s2.0-85052636272https://repository.li.mahidol.ac.th/handle/20.500.14594/45559© 2018 IEEE. This paper presents a differential fourth-order lowpass filter suitable for electrocardiography (ECG) acquisition. It is formed by cascading two compact and power-efficient biquads operating in the subthreshold region. Each biquad combines two capacitors and a flipped voltage follower circuit. The filter attains a cutoff frequency adjustable to cover the entire range of ECG (150-250 Hz). The filter prototype has been fabricated in a 0.35-μm CMOS technology. It occupies an area of 362 μm × 466 μm and operates from a 0.6-V supply. Measurements confirm that the filter consumes 0.9-nW static power for a 101-Hz cutoff frequency and contributes the inputreferred noise of 46.27 μVrms. For a 60-Hz input frequency, the filter achieves a dynamic range of 47 dB where the thirdharmonic distortion of -60 dB is produced. This leads to the figure of merit of 46.5 × 10-18 J. When the chip area is also concerned, the proposed filter performs comparably to the recent state-of-the-art nanowatt-class low-pass filter.Mahidol UniversityComputer ScienceEngineeringA 0.9-nW, 101-Hz, and 46.3-μV<inf>rms</inf> IRN Low-Pass Filter for ECG Acquisition Using FVF BiquadsArticleSCOPUS10.1109/TVLSI.2018.2863706