Publication: A Compact Sub-μW CMOS ECG Amplifier with 57.5-MΩ Z<inf>in</inf>, 2.02 NEF, 8.16 PEF and 83.24-dB CMRR
Issued Date
2021-06-01
Resource Type
ISSN
19409990
19324545
19324545
Other identifier(s)
2-s2.0-85107386181
Rights
Mahidol University
Rights Holder(s)
SCOPUS
Bibliographic Citation
IEEE Transactions on Biomedical Circuits and Systems. Vol.15, No.3 (2021), 549-558
Suggested Citation
Chutham Sawigun, Surachoke Thanapitak A Compact Sub-μW CMOS ECG Amplifier with 57.5-MΩ Z<inf>in</inf>, 2.02 NEF, 8.16 PEF and 83.24-dB CMRR. IEEE Transactions on Biomedical Circuits and Systems. Vol.15, No.3 (2021), 549-558. doi:10.1109/TBCAS.2021.3086182 Retrieved from: https://repository.li.mahidol.ac.th/handle/20.500.14594/76947
Research Projects
Organizational Units
Authors
Journal Issue
Thesis
Title
A Compact Sub-μW CMOS ECG Amplifier with 57.5-MΩ Z<inf>in</inf>, 2.02 NEF, 8.16 PEF and 83.24-dB CMRR
Author(s)
Other Contributor(s)
Abstract
This paper presents a compact DDA-based fully-differential CMOS instrumentation amplifier dedicated for micro-power ECG monitoring. Only eight transistors are employed to realize a power-efficient current-sharing DDA. A RC network (using MOS pseudo resistors and poly capacitors) forms feedback loops around the DDA creating an ac-only amplification. The proposed amplifier is dc-coupled via gate terminals of the p-channel input transistors. It thus achieves sufficiently high input impedance over the entire ECG frequency range. Fabricated in a 0.35-μm CMOS process, the proposed amplifier occupies 0.0712 mm2. It operates from a 2 V dc supply with 336 nA current consumption. Measurements show that the amplifier attains its input impedance of 57.5 MΩ at 150 Hz and achieves 1.54 μVrms input-referred noise over 0.1-300 Hz. Noise and power efficiency factors are 2.02 and 8.16, respectively. At 50 Hz, the mean CMRR of 83.24 dB is obtained from 11-chip measurement. Experiments performed on a human subject confirm the functionality of the proposed amplifier in a real measurement scenario.